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Gemini Near-Infrared Integral-Field Spectrograph (NIFS)

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Spectrograph Detector Hardware

8.1 Spectrograph Detector Specification

8.1.1 Introduction

NIFS is designed to use a 2048´2048 science detector. The science requirements for the instrument dictate a wavelength response from 1.0-2.5 mm and demand low dark current and low read noise performance. The higher dark currents normally inherent in detectors with sensitivity to 5 mm and the difficulty associated with blocking high thermal backgrounds at wavelengths beyond 2.5 mm further motivate the selection of a 2.5 mm cutoff device for NIFS.

The Rockwell Science Center has recently completed development of the 2.5 mm cutoff, 2048´2048 pixel, HAWAII-2 HgCdTe array for astronomy. This device is an evolution of the successful 1024´1024 HAWAII-1 array. It uses PACE technology in which the HgCdTe detector material is deposited on a sapphire substrate. The HAWAII-2 array is the baseline detector for NIFS.

The Rockwell Science Center is also developing low dark current 5 mm cutoff HgCdTe arrays for applications on NGST. These devices use HgCdTe detectors deposited on lattice-matched CdZnTe substrates using molecular beam epitaxy (MBE). The adaptation of this technology to 2.5 mm cutoff detectors promises improved performance over the HAWAII-2 arrays. We discuss this possibility below, but emphasize that Rockwell appear to have no immediate plans to develop 2.5 mm cutoff devices based on this technology.

The Rockwell Science Center is also experienced in producing HgCdTe detectors on silicon substrates. Silicon substrates offer some of the advantages of the CdZnTe substrate; silicon provides a better lattice match to HgCdTe than sapphire (but not as good as CdZnTe), and silicon substrates are obviously an excellent thermal expansion match to silicon multiplexers. Astronomical detectors based on this technology may be viable, but Rockwell appears to have no plans to develop such devices in the short term. We do not discuss this option further.

8.1.2 The HAWAII-2 Detector

HAWAII-2 PACE detectors are vertically-integrated hybrids (Figure 1 and Figure 2) that are made by flip-chip hybridizing an infrared detector array to a readout multiplexer using indium interconnects rather than solder bumps. The advantage of hybridizing is that the constituents can be independently optimized.

Figure 1: Hybrid focal plane array.

Figure 2: Hybrid focal plane cross-sectional view.

PACE substrates are made by first growing CdTe by metal chemical vapor deposition (MOCVD) on prepared sapphire substrates. The active HgCdTe layer is next grown by liquid phase epitaxy (LPE) from Te-rich melt. The photovoltaic n-on-p detectors are formed by implanting boron ions at room temperature, annealing at elevated temperature, and passivating the junctions with ZnS or CdTe. Metal pads (junction and substrate) are then deposited and, finally, indium is evaporated to provide the interconnects for subsequent hybrid mating. The specifications of the HAWAII-2 HgCdTe/Sapphire PACE technology detector as it appears on the Rockwell web page is shown in Table 1.

Table 1: HAWAII-2 Specifications

Parameter	Measured Values		Units
Number of Pixels	2048(H)´2048(V)		pixels
Architecture	4 fully independent 1024´1024 quadrants
Detector Interface Circuit	SFD 0.8 mm CMOS
Cell Pitch	18		mm
Die Size	< 40		mm^2
Integration Capacitance	18-35		fF
Signal Conversion Gain	3.4-6.8		mV/e
Output Signal Excursion	0.4-1		V
Maximum Data Rate	< 1		MHz
Maximum Settling Time	400		ns
Peak D* @ min Qb	> 1´10^14		Jones
Power Dissipation	< 2		mW
Wavelength Range	1-2.5		mm
Operating Temperature	70-80		K
Dynamic Range	up to 10 ^4		V/V
	Specification	Goal
Integration Capacity @ 0.5 V VRESET	60,000	100,000	carriers
Dark Current @ 0.5 V VRESET (77 K)	< 1	< 0.1	e/s
Read Noise (77 K)	< 15	< 5	e
Quantum Efficiency (77 K) 1.2 mm	50	70	%
Quantum Efficiency (77 K) 2.0 mm	60	75	%

The 2048´2048 HAWAII-2, 18 mm pixel arrays use similar technology to the 1024´1024 HAWAII-1 arrays. Both devices have a 2.5 mm wavelength cutoff. They are expected to have similar performance with a single double-correlated sample read noise of ~ 9 e. Read noises of ~ 4 e are likely using eight double-correlated (i.e., Fowler) samples. The dark current performance of the HAWAII-1 array is not well documented, due partly to the difficulty of measuring extremely low dark currents. Finger et al. (1998) report a mean dark current of < 30 e/hr (< 0.0083 e/s) for a HAWAII-1 array operated at 78 K. This very low measurement is limited by electrical drifts in the data system. The Rockwell Science Center WWW pages show a dark current distribution with a mode of ~ 0.01 e/s/pixel for a HAWAII-1 array at an operating temperature of 78 K (Figure 4 in §2.1.2). Kozlowski et al. (1998) plot a different dark current distribution for a HAWAII-1 array operated at 78 K. This has a mode of ~ 0.026 e/s/pixel and a high dark current tail extending to ~ 0.15 e/s/pixel. Bailey et al. (1998) quote a mean dark current of 0.05 e/s/pixel with > 99.66% of pixels having < 1 e/s dark current for a HAWAII-1 array operated at 77 K and 0.5 V reverse bias. Mackay et al. (1998) report a mean dark current at 90-110 K for three of their HAWAII-1 arrays of ~ 0.1 e/s/pixel and ~ 2 e/s/pixel for an earlier fourth array. They note that for their devices ~ 10% of all pixels have dark currents > 5 times the mean, ~ 4% have dark currents > 10 times the mean, and ~ 1% have dark currents > 20 times the quoted mean value. These hot pixels behave in a predictable and repeatable way. The latter two high dark current measurements are partly due to the higher detector reverse bias voltage or higher operating temperature used. We conclude that HAWAII-1 arrays are capable of achieving modal dark currents as low as ~ 0.01 e/s/pixel when operated below 70 K and with reverse bias voltages < 200 mV, but that the dark current distribution has a tail extending to > 0.1 e/s/pixel. The node capacitance is ~ 40 fF at this reverse bias (Hodapp et al. 1996), so the well depth is ~ 50,000 e. PACE technology devices have fast output amplifiers permitting sample times of ~ 5 ms/pixel, but they suffer from declining quantum efficiency at wavelengths shortward of ~ 1.3 mm (QE ~ 60% declining to < 50%) and significant persistence effects due to lattice mismatch between the HgCdTe detector and its sapphire substrate. Problems with amplifier glow in HAWAII-1 devices are expected to be solved in the HAWAII-2 devices, but this is yet to be verified.

A typical quantum efficiency curve for a HAWAII-1 array is shown in Figure 6 of §2.1.1 (Rockwell Science Center WWW pages). Representative read noise values as a function of the number of correlated double samples for a HAWAII-1 device are shown in Figure 3 (Hodapp et al. 1996).

Figure 3: Read noise for a HAWAII-1 array measured at 65 K with 250 mV reverse bias as a function of the number of correlated double samples (Hodapp et al. 1996).

HAWAII-1 PACE arrays are known to exhibit fringing in spectroscopic applications (Figure 4; Hodapp et al. 1996). This is caused by interference effects in the sapphire substrate on which the HgCdTe detector material is grown. It is likely that HAWAII-2 PACE arrays will show a similar effect.

Figure 4: Interference effects in a dispersed image recorded with a HAWAII-1 array (Hodapp et al. 1996). The spectrum ranges from the K band in the lower order to ~ 0.85 mm in the upper order.

The rate of ionizing events per pixel for the HAWAII-2 array with 18 mm pixels will be more than a factor of two lower than for the 27 mm pixel ALLADIN 1024´1024 InSb arrays used in NIRI and GNIRS. Mackay et al. (1998) quote cosmic ray detection rates with their HAWAII-1 arrays of ~ 1 event per square centimeter per minute, corresponding to ~ 815 events detected by a HAWAII-2 array in a 3600 s integration. Higher event rates may be experienced on Mauna Kea.

The first HAWAII-2 bare multiplexer was delivered to Klaus Hodapp in October 1999. The first science detectors were delivered to the original HAWAII-2 consortium members in February 2000. Rockwell are now taking orders from non-consortium customers with an 18 month delivery time. On this schedule, an order must be placed by April 2000 to ensure delivery of the science detector as required in October 2001.

8.1.3 HgCdTe/CdZnTe Substrate MBE Technology

The HgCdTe/CdZnTe substrate MBE technology detectors consist of a double layer planar heterostructure (DLPH) HgCdTe array grown by MBE on CdZnTe. This technology is being developed by the Rockwell Science Center for NGST. It overcomes many of the limitations of PACE technology devices by improving the lattice match between the HgCdTe detector and the CdZnTe substrate. This reduces the number of lattice defects and so produces lower dark currents, higher more uniform quantum efficiency, and eliminates the persistence problem. MBE devices with 5 mm cutoff typically have dark currents of ~ 0.01 e/s/pix, as low as or lower than 2.5 mm cutoff HAWAII-1 arrays and near the theoretical diffusion limit. If the same near-theoretical performance is achieved in 2.5 mm cutoff devices, these arrays should have dark currents approaching 0.001 e/s/pixel. MBE devices with 5 mm cutoff and no AR coating have measured quantum efficiencies that are flat at ~ 72% longward of 1.2 mm with no discernible degradation when cooled from 85 K to 60 K. The quantum efficiency of these devices is limited by surface reflection losses; Rockwell expects to achieve quantum efficiencies of ~ 85% over the 1.0-2.5 mm range using suitable anti-reflection coatings. This is made possible by the better refractive index match of CdZnTe. MBE devices with 5 mm cutoff show a dramatically reduced residual image of only 0.3-0.5% on the read after heavy saturation, with no detectable persistence on subsequent reads. The same should be true of 2.5 mm cutoff devices.

These remarkable improvements are partially offset by two difficulties with current CdZnTe MBE technology. The first is that CdZnTe and silicon are a poorer thermal expansion match than sapphire and silicon. This causes stresses between the detector substrate and the multiplexer during thermal cycling which makes early devices of this type prone to debonding between the detector and multiplexer. Rockwell have schemes for addressing this problem, but these are still developmental. The second difficulty is that CdZnTe currently can be obtained only in small wafers that accommodate just one 2048´2048 device. This means that devices must be produced individually on production lines that are in high demand. This is inefficient and the yield will be relatively low, so early devices are expected to be expensive.

We do not know whether HgCdTe/CdZnTe MBE arrays will exhibit fringing as HAWAII-1 PACE arrays do. It is possible that this effect will be reduced due to the better refractive index match between HgCdTe and CdZnTe.

HgCdTe/CdZnTe MBE technology has so far only been applied to 5 mm cutoff devices for the NGST development, and to date only for 1024´1024 pixel arrays. The NGST development is likely to be the main focus for Rockwell over the next two years. It is therefore questionable whether they will have the resources to develop 2.5 mm cutoff devices on a timescale suitable for NIFS.

8.1.4 Recommendation

NIFS is a fast-tracked instrument that is expected to be available on Gemini North by mid-2002. Meeting this schedule requires delivery of an engineering array before mid-2001 and delivery of the science detector by the end of 2001. This short timescale demands a conservative approach to emerging technologies.

It is clear that, when fully developed, HgCdTe/CdZnTe MBE devices will be superior to the current HAWAII-2 arrays. The higher and more uniform quantum efficiency will boost signals at all wavelengths, but especially in the J band. Most NIFS measurements are likely to be performed in the K band where ALTAIR will perform best. However, NIFS will be used in the J band to measure Pb 1.282 mm and [Fe II] 1.257 mm emission-lines in low redshift objects and Ha in high redshift galaxies where the improved sensitivity will be most beneficial. NIFS is expected to be detector noise limited for most observations in the J and H bands, so the signal-to-noise ratio will improve linearly with the quantum efficiency gain. Image persistence in a HAWAII-2 PACE array would be problematic in at least two ways; bright OH airglow lines will leave remnant images when switching between gratings, and bright standard stars and point spread function reference stars will leave remnant images in science object data. Both these complications will be greatly reduced, or eliminated, with a HgCdTe/CdZnTe MBE array.

Sensitivity improvements will also flow from the lower dark current of a HgCdTe/CdZnTe MBE device. We consider the likely noise sources in limiting NIFS observations in order to quantify these gains. NIFSSIM has been used to estimate the contributions due to dark current, read noise, and background emission detected between OH airglow lines to NIFS observations at the central wavelength of each of the four baseline gratings. The mean of the dark current distribution is assumed to be 0.01 e/s^/pix, but we noted above that actual dark currents may be up to 10 times larger than this in a typical HAWAII-2 PACE array. Typical noise contributions for a 3600 s integration using each of the gratings, with and without the scattered term, are listed in Table 2. This table shows that limiting NIFS observations in J and H will have comparable noise contributions from the three noise sources considered and K band observations will be background-limited, if the dark current is as low as 0.01 e/s/pixel. Dark current will be a significant noise source at all wavelengths if dark currents are as high as 0.1 e/s/pixel with a HAWAII-2 PACE array. A dark current reduction to below 0.001 e/s/pixel, feasible with a HgCdTe/CdZnTe MBE device, will realize a reduction in random noise at J and H over that shown in Table 2 of > Ö1.5 if scattered OH emission is significant, and > Ö2 if scattered OH emission can be eliminated. The improvement at K will be small. If we compare to a HAWAII-2 array with 0.1 e/s/pixel dark current, the sensitivity improvement is large at all wavelengths.

Table 2: Predicted NIFS Noise Contributions with a HAWAII-2 PACE Array

	With Scattered OH				Without Scattered OH
Grating	(Read Noise)^2	Dark Signal	Sky Signal	Noise	(Read Noise)^2	Dark Signal	Sky Signal	Noise
J1	25	36	31	9.6	25	36	8	8.3
J2	25	36	35	9.8	25	36	9	8.4
H	25	36	41	10.1	25	36	14	8.7
K	25	36	251	17.7	25	36	223	16.9

In practice, HgCdTe/CdZnTe MBE arrays will deliver even greater sensitivity gains because removal of the fixed dark current pattern during data reduction will be less crucial for data obtained with these arrays. The dark current pattern will dominate raw 3600 s integrations at J and H with a HAWAII-2 PACE array. NIFSSIM currently uses a Gaussian dark current distribution with s = 0.0065 e/s/pix, based on Figure 4. The RMS noise in a raw 3600 s dark integration is ~ 23.4 e due to this dark current pattern, larger by at least a factor of two than the J and H random noise values in Table 2 which are based on data in which the dark current pattern has been subtracted perfectly. The dark current pattern of a HAWAII-2 PACE array will need to be stable and to be measured accurately if this systematic effect is to be reduced to below the level of the shot noise due to the dark current itself (~ 6 e or ~ 17% of the mean dark current). In contrast, it will only be necessary for the dark current pattern of a HgCdTe/CdZnTe MBE array to be stable at the level of the read noise to achieve the same result (~ 5 e or ~ 140% of the assumed mean dark current).

The large sensitivity and stability gains possible with a HgCdTe/CdZnTe array due to both its higher quantum efficiency and lower dark current must be balanced against the likely availability of these devices on timescales appropriate to NIFS. Rockwell are not yet developing 2.5 mm cutoff HgCdTe/CdZnTe MBE detectors. If schedule is the prime consideration, the best course for NIFS is to order a HAWAII-2 PACE array. This will ensure delivery of a suitable detector array. We should also encourage Rockwell to pursue the development of HgCdTe/CdZnTe MBE arrays, and hope to convert the order to the more advanced technology if science grade arrays become available by late-2001. This approach will lead to significantly inferior performance from NIFS at J and H, compared to using a HgCdTe/CdZnTe MBE array, and may exclude observations of Ha in high redshift galaxies, for example.

On the other hand, waiting for a HgCdTe/CdZnTe MBE array is likely to delay delivery of the instrument.

It will be possible to retro-fit a 2048 ´ 2048 pixel HgCdTe/CdZnTe MBE array to NIFS if these become available after NIFS is commissioned. However, we note that HAWAII-2 PACE devices and HgCdTe/CdZnTe MBE devices have opposite polarity; the HAWAII-2 PACE detectors are n-on-p while the MBE detectors are p-on-n (Kozlowski et al. 1998). The SDSU-2 detector controller to be used is capable of supporting both polarities.

8.2 Spectrograph Detector Wiring

8.2.1 Introduction

The spectrograph detector wiring provides the components to safely mount the spectrograph detector and to conduct signals from the detector to the external wall of the cryostat. The detector wiring should place minimal heat load on the cooling system. It will provide the cooling path through which the cold finger cools the detector via the detector mount board. The detector wiring will also provide the mounting and wiring for the temperature sensor and heater that stabilize the detector temperature. The detector wiring should not prevent the detector read out time requirement of 5 s per frame being met. It should not introduce noticeable crosstalk or read noise, and it should also be flexible enough to accommodate shrinkage during cool down.

8.2.2 Baseline Design

A block diagram of the spectrograph detector wiring is shown in Figure 5. The baseline design of the spectrograph detector cryostat wiring is as follows

1. Two layer FR4 PCB detector mount board, which will contain a Yamaichi, model number NP89-44111-G4, Zero Insertion Force (ZIF) socket to mount the detector and the surface mount components (SMC) for decoupling and protection. This board will also provide the cooling path through which the detector will be cooled and thermally servo-controlled.

2. Teflon (PTFE) flex circuits, which will provide the flexible wiring between the detector mount board, intermediate connection, and the hermetic connector.

3. An intermediate connection consisting either of a two layer FR4 PCB intermediate board with two sets of microminature D connectors or just two mating connectors. This intermediate connection is included to ease the assembly and disassembly of the cryostat.

4. Circular hermetic connector, which will provide the through wall vacuum seal connection to outside the cryostat.

Figure 5: Block diagram of the spectrograph detector wiring.

8.2.3 Detector Packaging Information

There are 128 signals brought out to the ceramic chip carrier of a HAWAII-2 array. A list of these signals can be found in an Appendix (§16.4). Many of the same signals from different quadrants can be connected together so the minimum signal count can be reduced to below 35. Further work is need to define this number. Bonding information for the HAWAII-2 chip carrier is shown in Figure 6. The dimensions of the ceramic chip carrier are shown in Figure 7.

Figure 6: HAWAII-2 bonding information.

Figure 7: HAWAII-2 ceramic chip carrier dimensions.

8.2.4 Detector Mount Board

The detector mount board will provide the means to mount the detector together with any necessary decoupling and protection components. The baseline design is to use a socket soldered onto a PCB to mount and wire the detector. This is normal RSAA practice. The following sections discuss the detector mount, the PCB, and the selection and use of discrete components.

8.2.4.1 Detector Mounting

The detector will be mounted in a zero insertion force (ZIF) socket to minimize the chance of damage to the detector during assembly and disassembly. The ZIF socket will be soldered onto the detector mount board. Rockwell has recommended the Yamaichi, model number NP89-44111-G4, Zero Insertion Force (ZIF) socket (Figure 8) for this purpose.

Figure 8: Yamaichi, NP89-44111-G4, ZIF socket.

If the Yamaichi socket proves to be unsuitable, another suitable range of plastic PGA/Grid Zero Insertion sockets are made by 3M[1]. These sockets have been successfully used in previous instruments and have been found to be reliable and easy to use.

8.2.4.2 PCB Design and Detector Cooling

The ceramic chip carrier is a pin grid array of 19´19 pins with only the two outer rows of pins used for signals (Figure 7). The inner array of 15´15 non-signal pins is intended to be used for thermal cooling. If the ceramic chip carrier is mounted in a ZIF socket as is recommended and the ZIF socket is soldered onto the detector mount board, then the detector mount board will need to provide the conduction path through which the detector will be cooled. A copper block will be bolted to the board for this purpose. This block will be the thermally servo-controlled element used to control the detector temperature. The detector heater and temperature sensor will be mounted to this block. The inner array of 15´15 non-signal cooling ZIF pins will be soldered to the copper block by wires to provide the conduction path to this copper block. Each pin will have one wire directly connecting it to the copper block and all wires will be of equal length to minimize thermal gradients across the detector. The copper block will be cooled by connecting it via a flexible trimmable copper strap to an appropriate cold surface inside the cryostat (see §5.11 for further details). It may be necessary to electrically isolate the copper block from the copper strap if there is any electrical connection between non-signal pins and the detector or multiplexer substrates inside the detector. IfA currently uses the above technique to cool their test HAWAII-2 detector.

The detector mount board will be a two-layer, plated-through-hole, FR4 fiberglass board. The two-layer board should provide sufficient space to route signals as well as to provide sufficient space for ground planes. This type of board has been used successfully in cryostats in the past and should not present any problems. Nevertheless, ceramic PCBs will also be investigated as these offer better thermal expansion coefficient matching to the detector ceramic chip carrier and to the surface mount components, and have lower outgassing. Local board manufacturer, Lintek, offers a variety of ceramic filled Teflon boards that have a range of thermal expansion coefficients.

8.2.4.3 Surface Mount Components

Several discrete resistors, capacitors, and FETs will be mounted on the detector mount board. These components can be either surface mount or through hole components. Surface mount components (SMC) are the baseline design and have the advantage of being smaller compact components, but have the problem of thermal contraction mismatch between the SMC and the FR4 board material. With through hole components, the leads can be bent so as to strain relief the components. However, SMC components can also be strain relieved by using indium alloy solder. Indium Corporation of America manufactures a suitable range of indium alloy solders[2]. The local agent recommends 97%In/3%Ag solder for our application. This solder has silver added to the indium to improve strength and also has the wettability and low-temperature malleability of indium. This solder is recommended for cryogenic applications. If indium proves not to be suitable, normal tin/lead solder can be used as other institutions (e.g., Anglo-Australian Observatory) successfully use normal tin/lead solder to solder SMC components in cryogenic environments.

8.2.4.4 Protection Devices

It is normal practice at RSAA to minimize the number of electronic components inside the cryostat. Each component added reduces the reliability of the system. It has been reported several times by other institutions that their systems have failed due to failure of protection devices. Moreover, even when the system is operating correctly, there is no guarantee that the protection device has not failed or that it is working properly. For these reasons, no electro-static protection devices will be placed inside the cryostat. The electro-static protection to be provided is discussed in §8.4.3.

8.2.5 Flex Circuit

The detector mount board will contain all discrete decoupling components necessary to be located near the detector. The ideal wiring technique for interconnection is to use coax cable to minimize EMI. Unfortunately, the only suitable coax is made from stainless steel, which is not practical to use due to its high thermal conductivity and difficulty of soldering. Instead, we plan to use flex circuits. We have not used flex circuits in infrared instruments before, but we have used them successfully in CCD instruments. Other institutions (e.g., Anglo-Australian Observatory) have used flex circuits successfully in infrared instruments.

The heat load on the cooling system through the cryostat wiring will be kept below a level to be specified. The flex circuit will be the element that will drop the temperature from room temperature at the hermetic connector to the detector temperature (60-90 K) at the detector mount board. The thermal conductivity of the flex circuit must be kept low enough so that its heat load is below the value specified. The flex circuit must be flexible enough over the operating temperature range (60-300 K) to accommodate thermal shrinkage and vibration.

The requirement of reading out the detector in < 5 s requires that the settling time of the output amplifier be kept to a minimum. For detector output amplifier settling times greater than 400 ns, the settling time is controlled by the source follower slew rate. The slew rate settling time, T_S, for the output is given by

where C is the line capacitance, V_S is the maximum output voltage swing, and I_L is the load current. For example, T_S is 1 ms for C = 100 pF, V_S  = 1 V, and I_L = 100 mA. Appendix §16.3 gives a list of detector output amplifier settling times for various capacitances and load currents. The ways to reduce the settling time are

1. Increase the source follower current. This may be problematic, as increasing current will increase photoemission of detector output amplifier.

2. Reduce the capacitance by a) adding a buffer amplifier on the detector mount board, b) reducing the distance between the detector and the hermetic connector, or c) reducing the capacitance of the wiring by selecting flex circuit material with low capacitance.

The solution of adding a buffer amplifier adds complexity of additional components inside the cryostat and is not attractive, but will be considered as a last resort. Adding a buffer amplifier could also cause temperature variations in the detector from self-heating of this amplifier. The distance between the detector and the hermetic connector will be made as short as practical, but the extent to which this distance can be reduced will be constrained by other factors. The solution of reducing the capacitance by selecting the material of the flex circuit to have low capacitance is discussed further.

The two materials in common use for flex circuits are Teflon (PTFE) and Kapton (DuPont polymide). Table 3 describes the characteristics of these two materials.

Table 3: Teflon and Kapton Flex Circuit Characteristics

Material	Dielectric Constant	Dissipation Factor at 1 MHz	Outgassing Rates TML [3]	Outgassing Rates CVCM 3
Teflon	2.95	0.009	0.00%	0.00%
Kapton	4.5	0.15	0.96%	0.01%.

Teflon flex circuits are chosen as the baseline option for NIFS because of their low capacitance, low dissipation factor, low dielectric constant, and low outgassing rate. There is some risk associated with using Teflon flex circuits as they have only been used once before at RSAA for a CCD instrument. Tests will therefore be necessary to prove their reliability at infrared detector temperatures. The baseline design of the flex circuit is to use Taconic[4] TLE-95 132 mm (0.0052 inch) thick Teflon-based flex circuit with copper tracks 100 mm (0.004 inch) wide with 100 mm spacing (0.004 inch) and thickness of 40 mm. A criss-cross ground plane will be deposited on the bottom layer for shielding.

If Teflon proves to be unsuitable or too high a risk, then Kapton will be used. Kapton has a much higher dielectric constant, but is a more commonly used material for flex circuits. See Appendix §16.2 for calculations of capacitance for various flex circuits.

8.2.6 Connectors

To improve reliability, the wiring will be designed to use the least number of connectors and connectors will only be used where they are necessary to enable the assembly and disassembly of components to be easily and safely carried out. Connectors will be selected to operate reliably at low temperature, to have low outgassing and to be easy to use. The following sections discuss the various connectors needed.

8.2.6.1 Board to Flex Circuit Connectors and Intermediate Connectors

Connectors are required to mate the flex circuit to the detector mount board and also to provide intermediate connections. The baseline connector is micro-D subminature, 1.27 mm (0.050 inch) pitch. Information on a good range of connectors can be found at Min-E-Con[5] and Molex[6]. The micro-D connectors have proved to be reliable and are used extensively by other institutions and have been used successfully by RSAA. If possible, the micro-D connectors will be purchased with jackscrews to reduce insertion and retention forces when connecting and disconnecting. If micro-D subminature connectors prove to be unsuitable, then the following connectors could be investigated

1. HARWIN M80 series data mates. Information can be found at http://www.harwin.com and they can be sourced from Clarke and Severn[7]. The HARWIN connectors are designed for high reliability applications, They are used and recommended by the AAO.

2. 1.0 mm pitch and 0.5 mm pitch FPC connectors. These are zero-insertion force connectors, very small and it has been stated that they are easy to use.

3. Nanonics connector. These connectors are difficult to use and require large insertion force. They should only be used as last resort.

8.2.6.2 Hermetic Connectors

Hermetic connectors are required for connections through the cryostat wall. The baseline design uses standard 55 pin circular hermetic connector. These connectors have been successfully used in RSAA cryostats for many years, and have proved to be very reliable. However, due to their circular shape and solder buckets, they are not the best types of connector to be used with flex circuits. To make them more easy to use with flex circuits, an investigation should be carried out to determine if these connectors are available with solder pins rather than solder buckets. Another suitable range of hermetic connectors is hermetic subminiature D connector. These connectors could be much easier to use with flex circuits, but their availability will need to be investigated.

8.3 Spectrograph Detector Controller

8.3.1 Introduction

The spectrograph detector controller provides the biases and the correct sequence of clocks to drive the detector. It provides the detector output analog signal processor and data digitizer. The detector controller must communicate with the standard Gemini Input/Output Controller (IOC) to configure the detector controller, to initiate readouts, and to transmit command responses and image data. The requirements for the detector controller specify that it should be able to read out the full image or a simple rectangular subimage in less than 5 s, and be able to expose the detector from 10 s to 7200 s. It should be able to read out the detector in an idle and run mode of operation, and be capable of performing standard read noise reduction techniques to reduce read noise. It should be capable of driving a HAWAII-2 detector, and be able to support detector specific requirements such as multiple detector outputs, and if needed be able to limit the output amplifier glow by turning off the output amplifier during the exposure.

8.3.2 Baseline Design

The block diagram of the baseline design of the spectrograph detector controller is shown in Figure 9.

Figure 9: Baseline block diagram of spectrograph detector controller.

The baseline design of the spectrograph detector controller will consist of the following

1. San Diego State University SDSU-2 detector controller configured with the following components

· Two Dual Channel IR Video Boards configured for HAWAII-2 detector. These boards in total provide the capability to readout the detector through four video processing channels and drive 12 bias supplies. The bias supplies will drive the detector analog biases.

· IR Clock Driver Board, which provides 24 clock drivers. The clock drivers will drive the detector multiplexer clocks and the digital bias supplies.

· Fiber Optic Timing Board, which provides the timing sequencer and the communication hub for the other boards.

· Two short fiber optic communication cables. One that runs from the Timing Board to the IOC input/output connection panel and the other that runs from the IOC controller connection panel to the VME Interface board.

· Power Controller, 6 slot Backplane & Housing.

2. SDSU-2 VME interface board that plugs into IOC Instrument controller. This board provides the fiber optic communication interface between the SDSU-2 controller and the IOC Instrument Controller.

3. IOC input/output connection panel with two fiber optic feedthroughs. This panel provides a reliable place to connect and disconnect the fiber cables from the VME Interface board.

4. SDSU-2 Power Supply for 6 slot system and power supply cable with maximum length of 3 m. The power supply will be mounted to the NIFS cryostat.

5. External cryostat wiring manufactured from a composite of cables and wires. This wiring provides the connection from the hermetic connector of the NIFS cryostat to the SDSU-2 controller boards.

6. Two water jackets and hoses for cooling the SDSU-2 controller housing and power supply. One water jacket that bolts onto the controller housing and the other that bolts onto the power supply.

8.3.3 San Diego State University SDSU-2 Detector Controller

The San Diego State University SDSU-2 detector controller was chosen for the following reasons. First, RSAA has substantial experience with SDSU controllers. SDSU controllers have been in use at RSAA for several years and have been used in several instruments. Second, Gemini has adopted SDSU-2 controllers as their standard controller. The SDSU-2 controllers can be easily interfaced to a VME backplane based system such as the Gemini Standard IOC Controller. Lastly, no other competitive controller is known to be currently available that offers similar performance for the same price.

The list of components and prices for the SDSU-2 detector controller is shown in Table 4. These components are sourced from Infrared Labs.[8] who is the only supplier. All units will be ordered with the capability to operate from 120 VAC at 50 Hz and 60 Hz.

Table 4: SDSU-2 Detector Controller Components

8.3.4 Video Processor Board

There are two different video boards available for use with the SDSU-2 controller. The two boards are the Dual Channel IR Video Processor Board and the Quad Channel Coadder Video Processor Board. A detailed description of these boards can be found in Appendix §16.6. Both boards have essentially identical analog video processing chains. The dual video board has the capability of two analog video processing chains while the coadder board has four. Apart from the different number of video channels, the major difference between the two boards is that the dual video card provides six biases while the co-adder board provides image-processing capability by the Motorola DSP56002 DSP and 1Mword of SRAM.

The co-adder board solution will require a minimum of four Quad Coadder Video boards ($US40K) to provide enough SRAM, 4Mwords, for co-adding as the HAWAII-2 is a 2048´2048 detector and thus has 4 Mpixels. The co-adder boards have no bias generators, so with this solution the biases will need to be sourced from the clock board. On the other hand, the dual video board solution will require two boards ($US10K) as the requirement of reading out the HAWAII-2 at a readout rate of 5 ms per pixel can be met by reading out through four output amplifiers. All image processing (co-additions) will need to be performed in an external processor. The biases can be provided by one of these dual video boards.

Two dual video boards is the baseline solution and was chosen for the following reasons. First, the required readout rate is modest as such the image data can be easily acquired and transferred to an external processor for co-adding. Therefore, the DSP processing capability is not essential. Second, the image processing capability of the co-adder board solution is not suitable for more complicated readout methods such as linear fitting where the image processing requirements will need more memory for data storage and program than that provided on the co-adder boards. Lastly, the co-adder board solution is much more complex as it adds four additional DSPs, which must all be synchronized in order to properly readout the detector. As well, code will need to be developed for these DSPs. This will add additional costs and risk. The cost of the co-adder boards solution is more expensive $US40K than the dual video boards, $US10K plus cost of external image processor. However, if the standard IOC controller provided by Gemini has sufficient processing resources to do the necessary image processing then the dual video board solution will only cost $US10K.

8.3.5 SDSU-2 Detector Controller Performance

Table 5 summarizes the SDSU-2 detector controller performance.

Table 5: SDSU-2 Detector Controller Performance

Parameter	Description
Power Dissipation	4 channel system : controller box ~ 50 Watts, Power Supply ~ 50 Watts
Fiber Optic Cable	AT&T ST type connectors, 62.5/125 micron multimode Ge-doped silica core fiber cable. To stop light leaks, outer sheath must be black.
Command and Reply Transmission	32 bit long, plus one start bit, with the most significant bits first, NRZ scrambled. Twenty-four bits contain useful data, and eight are header bits. Commands are transmitted at 4 Mbits/s and replies are received at 50 Mbits/s.
Data Transmission	Image data word is 16 bits plus 1 start bit, Fiber rate is 50 Mbits/s, Pixel transmission time is 400 ns/pixel with 60 ns buffer between pixels, data rate is 2.5 Mpixels/s.
Timing Sequencer	Motorola DSP560002 40ns per instruction time, 50 MHz clock
Timing Sequencer Memory	32K´24bits; 8K P: program, 8K X: data, 16K Y: data memory.
Clock Driver Board	24 drivers per board, with selectable voltage range of each 0 to +5V, -5V to 0V and –5V to +5V. The level within these ranges is set by 12 bit DACs,
DC bias, IR Video Board	Six 12 bit DAC programmable DC bias supplies, range +0.0 to +5.0, Noise < 1 mV rms,
A/D converter	Datel ADS-937, 16 bit straight binary, 1 ms conversion time (1 MHz sampling rate) including 300 ns internal sample/hold.

The required time to readout the whole detector is 5 s. The HAWAII-2 has 2048´2048 pixels and will be read out through four amplifiers. This will requires a pixel rate of ~ 5 ms/pixel. For a four channel SDSU-2 controller, the fiber optic communication link limits the pixel rate to a maximum of 1.6 ms/pixel (4/2.5 Mpixels/s data rate). This more than satisfies the required pixel rate of 5 ms/pixel. The timing sequencer has a clocking time resolution of 40 ns and the A/D converter on the IR video driver board converts in 1 ms conversion time including the time for the 300 ns internal sample/hold. These also more than satisfy the required pixel rate of 5 ms/pixel.

The timing board DSP will not be required to store any pixel data. Therefore from past experience and from looking at HAWAII DSP code from other groups, the timing sequencer memory of 32K´24bits; 8K P: program, 8K X: data, 16K Y: data memory is more than adequate.

The clock driver board can drive up to 24 clocks. Each has a selectable voltage range of each 0 to +5V, -5V to 0V, and –5V to +5V. This number is more than adequate if the clocks of each quadrant of the HAWAII-2 detector are connected together and each quadrant requires 10 clocks. The selectable voltage range will allow both the HAWAII-2 PACE devices (n-on-p) (see §8.1.4) or the HgCdTe/CdZnTe MBE devices (p-on-n) (see §8.1.4) to be accommodated. Each IR dual video driver board can drive up to 6 biases. For two boards, this gives a total of 12 biases. This is more than adequate if the majority of each quadrant biases of the HAWAII-2 detector are connected together and each quadrant requires five biases.

The HAWAII-2 has a usable dynamic range of 1.0´10⁵ (Rockwell web site) and the predicted read noise is 4e (§2.1.1) using Fowler sampling with n=4. A 16 bit A/D converter, which has 65536 levels, is then adequate to digitize the analog signal.

8.3.6 Linearity

The output amplifier of the detector is normally configured as a source follower. The load of this source follower is normally provided by the detector controller. This is where one of the major causes of non-linearity with respect to the detector controller occurs. For this reason, different detector load are discussed.

The simplest and most commonly used load is a resistor. The gain of the resultant source follower is

where g_m is the transconductance of the FET, r_o is the output resistance of the FET, and R_L is the resistance of the load. The transconductance, unfortunately, is proportional to the DC operating drain current and this current varies as the operating point of the amplifier changes in response to variations in the input signal. This causes non-linearity. If the input signal variations are kept small, this non-linearity shall be small as well and if properly designed will be less than the detector non-linearity. The other type of load is a current source. In this case, the DC operating drain current is controlled by the current source and is much more stable, and thus the transconductance, and therefore the gain of the source follower is much less dependent on input voltage variations. The majority of users of the SDSU-2 controllers use a simple resistor as the load. The problem with providing a current source/sink is the difficulty in designing one that is programmable and both accurate and low noise. As the signal excursions are very small, and people like Klaus Hodapp of University of Hawaii uses only a resistor load and the output amplifier non-linearities are well understood and can be corrected, it is proposed to use a resistor load.

8.3.7 Detector Stability

8.3.7.1 Introduction

Because of the long integration times (3600 s), low readout noise (few e) and the nature of the way the double correlated sampling readout is performed, good DC and gain stability of the system is essential. This is especially true if the fixed pattern dark current discussed in §8.1.4 is to be accurately subtracted. The specification of stability is that the drift over the longest exposure time should be less than the read noise. The stability of the SDSU-2 controller driving a HAWAII-2 detector has been highlighted as an issue (Klaus Hodapp, priv. comm.) that needs further investigation. Klaus Hodapp has stated that Rockwell will build a dummy pixel onto the chip, which can be used to measure and subtract DC drifts. It is currently unclear what is referred to as a dummy pixel. Whether it is a separate circuit on the detector with separate pins which can be inputted into the data system or whether it is an extra pixel or row/column on each quadrant of the detector. Further investigation will need to be carried out to obtain additional information on this feature and to identify what additional circuitry and data processing will be needed to take advantage of it. The following subsections look at issues associated with DC and gain drifts.

8.3.7.2 SDSU-2 Controller Bias Specifications

DC and gain stability will depend on the SDSU-2 controller bias stability. The specifications of the SDSU-2 controller bias supplies are shown in Table 6. The bias temperature stability and detector sensitivity to bias changes are not known and will need to be measured (§8.7.2).

Table 6: SDSU-2 Bias Supply Specifications

Parameter	Value
Number of DAC bit	12
Voltage range (V)	0 to +5
Set error resolution (mV)	3
Long term stability (mV)	2

8.3.7.3 Temperature Dependency

Variation in temperature is normally the major cause of stability problems. Therefore, the temperature variation of the detector and the detector controller will be discussed.

In communication with John Barton of the AAO, he has stated that from measurements he has made with HAWAII‑1 detectors had lead him to conclude that the detector temperature should be controlled to within 1mK over the longest exposure time. The output variation with temperature John Barton measured was 1500 e/K. As discussed in §8.1.4, the detector must be stable enough to properly subtract the fixed pattern dark current. This is normally done by forming a dark subtraction frame by averaging a number of dark frames, say 10, to reduce S/N. To properly form this dark frame, the system should be stable to within the noise of the dark frame which is the noise of each individual frame divided by SQRT(number of frames) = SQRT(10). For the case of dark current of .01 e/s, an exposure time of 3600 s will have a dark current of 36e. The noise of this dark current is SQRT(36) or 6e. To properly subtract the fixed dark current, then the system should be stable to less than 6e/SQRT(10) or 1.8e. This will require the temperature to be stable to 1.8e/1500e/mK = 1.2 mK. The requirements for the detector system states that the DC drift should be less than the detector read noise. The goal of the read noise of the HAWAII-2 detector specified by Rockwell is less than 5e (see Table 1). Using Fowler sampling or linear fitting readout methods §8.3.9, this read noise could be reduced to a few electrons. If this read noise is achieved then the drift should also be only a few electrons and this will require the temperature to be stable to 1 mK. It is therefore proposed to servo control the detector temperature to within 1mKelvin over the longest exposure time (3600 s). If this specification can be implemented, the variation of the average detector temperature should not be a contributing factor to the drift. However, local heating of the detector output amplifier or the regions of the detector near the multiplexer shift register may still cause problems. This will need to be investigated when the detector is characterized. As for the detector controller, the SDSU-2 controller will be water-cooled and its temperature will be dependent primarily on the water temperature and secondarily on the dome temperature. The specification of the water chiller temperature is that it will track the dome temperature. There is at present no information on how the detector controller varies with temperature and how these variations will affect the detector. Measurements are discussed in §8.7.2. to determine these relationships.

8.3.8 SDSU-2 Cooling

The total heat generated by the NIFS instrument and convected into the dome air space should be less than 50 Watts. The contribution to this heat generated from the spectrograph detector controller and power supply should be a minor component. The power dissipation of the baseline detector controller is 50 Watts and the power dissipation of the power supply is 45 Watts. As this power dissipation is much greater than the heat generated budget, a method of cooling both the controller housing and the power supply will need to be provided.

Water-cooling has previously been successfully used by RSAA to cool SDSU controllers and standard heat exchanger water jackets that bolt onto the controller have been developed. It is therefore proposed that the same method will be used here. An alternative mounting arrangement is to mount the controller power supply inside one of the cooled instrument cabinets. In this case, the power supply will be air-cooled. If this option is chosen, further investigation will be needed to determine if the power supply box will need additional heat sinking to improve the cooling process.

In §8.3.7.3, we discussed that there may be stability problems caused by detector controller temperature variations. If water-cooled, the detector controller temperature will track the water temperature. The water from the water chiller is thermally controlled but tracks the dome temperature. The baseline design does not provide any temperature control of the detector controller however it may prove necessary. One possible method is to thermally servo control the SDSU-2 housing by using a cooling water flow control value to restrict the flow of cooling water to the controller housing. A commercial temperature controller could be used to monitor a temperature sensor mounted inside the temperature controller to produce an output signal to drive the flow control value. In this case, the SDSU-2 controller housing temperature would need to be set several degrees above the water temperature.

8.3.9 Readout Methods

The read noise and performance of the detector can be improved by proper selection of the readout method. The following sections will discuss the various readout methods in common use. NIFS will implement three readout methods. These are double correlated sampling, Fowler sampling and linear fitting methods. Each of these methods have advantages in certain observing situations and thus to maintain maximum observing efficiency all three will need to be implemented.

8.3.9.1 End Read Method

In end read method, the detector is reset, then charge is accumulated for the exposure time, after which it is read. This method is only useful in high background cases, because of the high kTC readnoise (~60 e). However, it is the most efficient readout because there is only one read. Typical application of this method is broad band imaging. Because whole columns are reset at a time in the HAWAII-2 detector, it is not practical to implement end read method and it will not be discussed further.

8.3.9.2 Double Correlated Sample

In double correlated sample method, the detector is reset, the start pixel value is read once, charge is accumulated for the exposure time, then the end pixel value is read once. The end pixel value is then subtracted from the start value. This method has a lower read noise (<10 e) as it removes kTC noise. This method is the fastest readout method and is a useful method for idle mode as it gets rid of most of the bias structure and for observing bright objects or in high background situations where the other methods will saturate the detector.

8.3.9.3 Fowler Sampling

In Fowler sampling, the detector is reset, the start pixel value is repeatedly read out N/2 times; these values are co-added on a pixel-by-pixel basis and stored, charge is accumulated for the exposure time after which the end pixel value is repeatedly read out N/2 times; these values are also co-added on a pixel-by-pixel basis. The co-added results from before and after the exposure are subtracted and normalized. The improvement in read noise is Ö(N/2) (Fowler & Gatley 1990) over that of the double correlated sample method. Typical applications of this method are imaging and spectroscopy of medium length exposures time.

8.3.9.4 Linear Fitting

In non-destructive read (NDR) or linear fitting method, the detector is reset, the pixel values are repeatedly read at even time intervals throughout the exposure period. The series of non-destructive reads (NDRs) are saved. At the end of the exposure, the entire data set is linearized in readiness for a least-squares linear regression fitted through the NDRs to define the incident photon rate. This method has a number of advantages. The bias is very small, so that in real time you see useful data without needing a previous dark exposure. Long exposures are punctuated by frequent displays so that one can see how the exposure is progressing. And pixels that saturate (as on bright stars) are still correctly measured by using only the span of reads up to saturation. The improvement in read noise is Ö(N/12) (Chapman et al. 1990) over that of the double correlated method. Linear fitting also attenuates 1/f noise by taking frequent samples of the signal. The exact extent of this attenuation is not known and will need to be investigated further. However, the linear fitting method reduces noise at a rate of Ö(N/12) as opposed to Fowler sampling which reduces noise at a faster rate of Ö(N/2). Thus for n=18, Fowler sampling improves read noise by a factor of 3 where linear fitting only improves it by 1.22. Typical application of this method is spectroscopy where extremely long exposures are practicable and often desirable as with NIFS.

8.3.10 DSP Code

The NIFS detector controller baseline design has two DSPs. One is on the VME interface board to the IOC controller. The other is on the timing board. Code will need to be provided for both these DSPs. The following sections discuss this code.

8.3.10.1 VME Interface Board

The VME Interface board provides the communication path between the fiber link on the timing board and the IOC (I/O Controller). It send commands from the IOC to the timing board and accepts image data from the timing board and writes them to the VME memory using an on-board DMA (Direct Image Access) controller. The VME board utilizes a Motorola 56001 DSP for housekeeping and DMA address generation. A local buffer memory (32K´24bits) stores incoming image data to avoid lost data if the VMEbus is unavailable for short periods. Interrupts can be generated by the interface board, and VMEbus memory can be written to or read from under control of the on-board DSP. The DSP has the capability to perform some limited data processing, however, it is envisaged that no special data processing or data sorting will need to be done in this DSP. The SDSU VME bus interface board Users Manual describes the VME board, the DSP code and the command interface.

In all three readout methods discussed above (§8.3.9), a single command will be issued from the IOC to the timing board to initiate readouts. In response to this command two or more frames of image data will be transmitted to the IOC for data processing and storage. In the case of linear fitting, the frames are transmitted at regular intervals throughout the exposure. In order to begin early processing of this data before the exposure is complete and to display the image building up during the exposure, a method of synchronizing the data transfer must be provided. To achieve this data synchronization, it is proposed to set up the VME interface board to generate interrupts at regular intervals and between frames of data (§9.6.3.4.4.1). The standard VME board DSP code does not implement this capability, however, NOAO have code for GMOS that does. The GMOS code is designed to operate with a single output CCD and may require minor modifications to better suit our application.

8.3.10.2 Timing Board

The Timing Board DSP code is the major piece of software that drives the detector controller. It is responsible for controlling all aspects of reading out the detector and the setting and turning on and off of the clock and bias voltages.

A preliminary draft of the command interface between the SDSU detector controller timing board DSP code and the detector controller software running on the IOC controller has been defined. This command interface has the ability to set the bias voltages, exposure time from 10 s to 7200 s, region of interest parameters and provides the necessary commands to implement the required readout methods (§8.3.9) in the idle and run modes of operation. It provides an abort command to abort an exposure and any other commands that do not finish execution within an acceptable short period of time. It also provides commands to turn the bias and clock voltages on and off in the correct sequence.

The quadrants of the HAWAII-2 detector appear to be rotated by 90º as you go clockwise around the ceramic chip carrier. Rockwell has verified this. This means that the fast and slow multiplexers will also be rotated by 90º. The assumed orientation of the quadrants is shown in Figure 10. The ability to do region of interest is complicated by the orientation of the quadrants. The standard DSP code operates by sequentially clocking the fast multiplexer to read a row of data and then clocking the slow multiplexer to access the next row and so on till the whole chip is read out. The signals from the four output amplifiers are processed and digitized in parallel. However, if the quadrants are rotated by 90º, then the first row of data read will consists of pixels from the bottom row of quadrant 1, the left column of quadrant 2, the top row of quadrant 3, and the right column of quadrant 4. The next row will consist of pixels from the 2nd bottom row of quadrant 1, the 2nd left column of quadrant 2, the 2nd top row of quadrant 3, and the 2nd right column of quadrant 4 and so on.

Figure 10: Assumed definition of HAWAII-2 quadrant orientation.

This complexity will require up to three regions to be defined to readout a simple rectangular region (§9.6.3.5). The time efficiency of region of interest will depend upon the particular region chosen. The least efficient region of interest will be when a whole quadrant needs to be accessed to read out the region of interest. The most efficient will be when a central square in the middle of the detector is read out.

As the most used region of interest will be a strip across the detector, the ability to readout from three regions will be required and will need to be provided. The standard method to implement region of interest is to use several write memory commands, 'WRM', and to modify locations in the timing board DSP code to change the parameters listed in Table 7.

Table 7: Memory Locations For Region-of-Interest Parameters

Memory Location	Parameter	Description
Y:1	NCOLS	Number of columns in region of interest
Y:2	NROWS	Number of rows in region of interest
Y:4	COL_OFFSET	Number of columns to skip before region of interest
Y:5	ROW_OFFSET	Number of rows to skip before region of interest

However, due to the complexity of the detector having quadrants that are rotated by 90° with respect to each other, this simple way of describing region of interest is inadequate and a more general and flexible way is needed. The region of interest will therefore be implemented in the same manner as that developed for CICADA (CICADA Users Manual).

This flexible region of interest is implemented by writing into a reserved area of timing board DSP Y memory area starting at address Y:3F0 and having a memory size of 48 words. The way in which this memory is used is as follows

· The first location contains number of parallel region descriptors, PREGIONS.

· This is then followed by PREGIONS parallel region descriptors, where each parallel region description contains:

- Number of parallel rows to skip

- Number of parallel rows to read

- Number of serial region descriptors, SREGIONS

· This is followed by SREGIONS serial region descriptors, where each serial region description contains:

- Number of pixels to skip

- Number of pixels to read

- Number of pixels to skip to clean up the serial register.

The above region description can be used to describe very complicated regions. Its only limitation is the amount of memory it uses.

A description of the HAWAII-2 detector with respect to the biases, the clocks, the sequencing of clocks to readout the detector can be found in the Appendix §16.5. This description is incomplete and additional information will need to be obtained when available from Rockwell such as precise clocking of the horizontal and vertical registers, orientation of the detector quadrants in the ceramic chip carrier, and clock and bias nominal voltage values.

There are many examples of DSP code available for driving HAWAII detectors. This code has been examined and a good idea of how to write code for the HAWAII-2 has been developed. There are two ways to proceed to develop code for the HAWAII-2. One is to modify existing HAWAII DSP code to accommodate the HAWAII-2 detector. The other is to wait until the HAWAII-2 detector is more widely used and to try to obtain a copy of code that drives this detector and to modify this to accommodate our requirements. The exact technique will be decided later.

In writing the DSP code, the following rules will be followed. To minimize down time, all code will be thoroughly tested and debugged. Where exceptions or faults occur, the exception or fault will be reported, however corrective action to minimize the impact on the continuation of observing will be taken except in circumstances where there is a likelihood of damage to the detector.

8.4 Wiring Considerations and Grounding

8.4.1 Grounding And EMI Shielding

To obtain reliable operation and the best noise performance, it is very important to properly design the grounding and shielding. As the system will be mostly built from pre-constructed components, the grounding scheme will be primarily concerned with the way these components are mounted and interconnected. As far as possible the following rules will be adhered to

1. Shield coax or twisted pair cable should be used to interconnect components. The shield of these cables should only be connected at one end so as to avoid ground loops.

2. Electrically noisy components and signals should be kept away from low level sensitive ones and ground shields should be placed in between.

3. Noisy grounds should be kept separate from low level electronics grounds. Several grounds will be used and these will be connected at one star point. The first ground will be a hardware ground used for mechanical enclosures, chassis, racks and so on. The second will be a noisy ground used for relays and motors. The third will be a digital ground and the last will be an analog ground. The AC power ground will be connected to the hardware ground.

8.4.2 Detector Grounding Scheme

To achieve the low noise performance of the detector extra care should be taken with detector grounding and shielding.

When laying out the cryostat flex circuit the following guidelines will be used. Physically separate the bias and output signals from the clock signals and place a shield ground track between these two groups of signals. Position the output signals as far as possible from the clocks and place the biases between the output signals and the clocks. A shield ground track should separate the biases from the output signal. As well, each individual output signal should be separated by a ground shield track. The possibility of running the return current bias of the output amplifier along side the output signal should be investigated. This should create a better transmission line affect and reduce cross talk. If the thermal load budget permits, then a bottom or a top and bottom shield ground plane should be added to the flex circuits. If the thermal load is too high then a partial ground plane shield should be considered. To eliminate earth loops, the shielding grounds should only be connected at one end. Only one ground should connect the detector to the detector controller and this ground should be made much larger than the other signals to reduce its impedance and therefore the ground noise. When the detailed design begin, there will be a better understanding of the detector signals and the way they are used, and a more detailed list of layout guidelines will be generated.

The following guidelines should be followed for the wiring between the cryostat hermetic connector and the SDSU-2 detector electronics. Use coax cables for the detector output signals. These coaxes will be grounded only at the Video board end. The biases can be grouped together into a single multi-core cable, and a common shield provided. This shield will again only be connected at the Video board end. For now, it is proposed that the clocks will be grouped together, and a common shield provided around them. This shield will only be connected at the Clock board end. Further study will be needed to determine whether this shielding is sufficient. Note that the wiring distance between the detector electronics and cryostat will be made as short as possible (< 200 mm) and as such while it is planned to take all care with the wiring shielding and layout design, it is not of paramount importance. The detector controller ground scheme is to make one of the video boards the star point and from it have a short ground wires to the other video board, the clock board and the controller chassis. The detector ground will also connect to this ground point.

8.4.3 Electrostatic Protection

The detector is one of the most critical components of the system. Besides being very expensive and having long lead times to purchase, a considerable amount of time is spent characterizing and optimizing its performance. It is therefore very important to protect it and the controller electronics from Electro-Static Discharge (ESD) during assembly and disassembly, transportation, storage, and use. The detector will be protected in the following situations:

1. Due to abnormal circumstances, it may be necessary to connect and disconnect the detector electronics from the cryostat. A procedure for safely connecting and disconnecting the detector controller from the Cryostat will be written. As well, dissipative shorting plugs will be provided to plug on all connectors to eliminate any potential for direct contact with connector pins.

2. When installed, the SDSU-2 video processor and biases provide parallel resistance to ground and the clock board provides zener diode protection and analog switch isolation. In addition the signals to the detector are physically inaccessible reducing the probability of an ESD event directly to these lines.

3. A procedure for properly powering up and shutting down the controller during normal use will be provided. This procedure will be implemented in the DSP code and the instrument software.

4. During initial assembly and test, and later maybe for fault fixing it will be necessary to assemble and disassemble the detector and cryostat wiring. A procedure for safely assembling and disassembling the detector and cryostat wiring will be provided. As well, dissipative shorting plugs will be provided to be placed on the connectors of the detector mount board, the intermediate connectors etc. A suitable method of connecting these connectors to ground potential will be provided. A possible way is to connect a flying lead with an alligator clip to the ground of these connector.

For the reasons discussed in §8.2.4.4, it is not planned to place any ESD protection devices inside the cryostat.

8.5 Detector Controller Location

The detector controller and hermetic connector port must be located as close as possible to the detector. The port position used for NIRI would require a flex circuit length of ~ 550 mm. The port will be moved so that the required flex circuit length is only 185 mm. The modified position is the correct choice for the following reasons. With the baseline design 5.2 mils Teflon flex circuits, the original position would have a flex circuit wiring capacitance of 39 pF as opposed to the modified position which will have 12 pF. If 2 mils Kapton flex circuits are used, then the original position would have a wiring capacitance of 88 pF and the modified position which will have only 28 pF. The capacitance of the external wiring is 9 pF and is the same in both cases. The greater capacitance would create the following problems: First, the settling time of the detector output for 5.2 mils Teflon flex circuits would be 0.5 ms for the original port position and is only 0.2 ms for the modified position. For 2 mils Kapton flex circuits, the settling time of the detector output circuits would be 1.0 ms for original port position and 0.4 ms for the modified position. For a pixel rate is 5 ms/pixel, the settling times for both Teflon flex circuits are acceptable. However, manufacturing or reliability problems with the Teflon flex circuits could lead to the use of the more commonly available 2 mils Kapton flex circuits. Then the settling time of 1.0 ms of the original port position is unacceptable. The other problem with increasing the capacitance is that additional heat will be dissipated in the detector output amplifier charging and discharging this capacitance. This additional heating will cause greater output amplifier glow and drift problems within the detector. The extent by which this will increase amplifier glow and drift is currently unknown, but will be proportional to the capacitance. The longer flex circuit length of the original port position will require additional effort and costs to layout and shield the flex circuit in order to achieve the required low read noise and low wiring cross-talk. More care will be required to isolate output signals from each other and to isolate clocks from biases and output signals. As well, it will be much more important to obtain good shielding around the flex circuits to stop EMI coupling. The cost of relocating the port is low compared to the cost of rectifying detector performance problems caused by the longer wiring to the original port location.

8.6 Detector Test Facilities

The following facilities are available or will be constructed by RSAA to assist in the detector characterization.

8.6.1 Test Cryostat

The spectrograph detector will require extensive testing and characterization before it is installed into the NIFS cryostat. The reasons are as follows. First, the NIFS cryostat will not be ready to put any detector in until very late in the project. This is because the optical and mechanical components will need to be assembled and substantial tests conducted before the detector can be installed. Second, the cryostat and its components will need to be thoroughly baked out before a detector is installed. Next, the thermal characteristics of the cryostat and the detector thermal control system will need to be thoroughly tested before the detector is installed. Next, damage (i.e., a finite number of Indium bump connections going open) to the detector is likely to occur every time it is temperature cycled. Therefore, the number of temperature cycles of the detector should be kept to a minimum and as such the detector should only be installed into the NIFS cryostat when everything else has been thoroughly tested and is operational. Lastly, even though the science detector should not be temperature cycled, it may be necessary to temperature cycle the engineering detector several times as the controller, wiring and detector problems are sorted out. The NIFS cryostat will not be productive for these tests as the cycle time of cooling down and warming up of the NIFS cryostat will be considerable (8-10 days).

Therefore, we plan to construct a test cryostat to test and characterize the detector. The requirements of the test cryostat is that it has a cool down/warm up time of less than 24 hours, it cools the detector to 60 K and allows it to be heated to 90 K while maintaining the detector temperature to within 1 mK over a 3600 s exposure time. In addition, it must be capable of accommodating the final NIFS detector wiring and detector mount so that these items can be pre-tested. The test cryostat must also be able to completely blank off the detector for dark current measurements, and to illuminate the detector fully or partially in each of the J, H, and K photometric bands for measurements of flat fields, persistence, cross-talk and quantum efficiency.

8.6.1.1 Baseline Design of Test Cryostat

The baseline design of the test cryostat will consists of the following

1. A modified eight-inch Infrared Labs cryostat with two liquid nitrogen (LN₂) cans. An outer can that is connected to the radiation shield. An inner can that is connected to the cold surface. The inner can will be vacuum pumped so that the nitrogen goes through a phase change and becomes solid. This reduces the temperature of the inner can and thus the cold surface to around 55K. RSAA has an existing cryostat that will be suitable.

2. Special purpose detector wiring and detector mount board that will bring out separately all clocks, biases and output signals from each of the HAWAII-2 four quadrants.

3. Filter wheel with positions for cold stop for doing darks, open position and photometric filters J, H, and K. The filter wheel will be manually rotated to move from one position to the next.

4. Imaging optics so that the detector does not look out through a wide angle at 300K. If the detector does look out through a wide angle, it will not be able to be read out fast enough to avoid saturation.

5. The pre-purchase of an Omega CYC321 temperature controllers and diode temperature sensor for measuring the cold surface temperature and the pre-purchase of the detector temperature controller and sensor.

6. Test image generator. One for projecting hot spots to one quadrant of the detector for testing crosstalk and the other for projecting lines to test spatial characteristics.

7. Infrared LED mounted inside the cryostat for projecting flats onto the detector. This LED will be controlled from outside the cryostat.

8.6.1.2 Detector Wiring

In this section, detector wiring refers to both the internal cryostat spectrograph detector wiring plus the external wiring from the hermetic connector to the SDSU-2 detector controller. There are two possible ways of proceeding. One is to manufacture the final NIFS spectrograph detector wiring and to install this into the test cryostat. The other is to design a more flexible custom cryostat wiring.

Using, the final detector wiring has the following advantages. First, the final detector wiring can be evaluated and thoroughly tested. Next, only one set of spectrograph detector wiring will need to be manufactured and tested. Lastly, tests will exactly evaluate the final situation. Output amplifier settling times will be measured accurately because the wiring lengths are one and the same. Crosstalk measurements will exactly indicate any wiring crosstalk problem.

Using custom detector wiring has the following advantages. First, custom detector wiring will allow the wiring to be customized for testing purposes. One customization is to bring out all clocks and biases separately from each quadrant rather than connecting them together. The advantage of this is that it makes it possible to determine whether there is any advantage in separately adjusting the bias voltages (VRESET, BIASGATE and BIASPWR) of different quadrants to improve well depth, settling time or dynamic range. As well as whether adjusting the individual clock voltages of each quadrant will reduce multiplexer glow or residual image problems. Next, substantial testing of the detector can be performed before the final design and manufacture of the wiring is done. This initial testing phase will be necessary as the HAWAII-2 detector is still in its early development stage and not a lot is known about its performance and wiring requirements. Thirdly, the detector wiring materials, components and construction techniques can be evaluated on the custom wiring before the final decision is made about which ones to use. Lastly, the engineering chip may have problems with one or more quadrants. These problems can best be circumvented if custom wiring is used in which all clocks and biases are brought out. This is especially true where the fault is a short of a clock or bias on one quadrant to the substrate.

The baseline design is to initially design, manufacture and install custom detector wiring in the test cryostat. This wiring will bring out separately all clocks and biases as well as the eight signal outputs from each quadrant. Performance tests will then be performed to determined which clocks and biases can be connected together, how many outputs per quadrant are needed, and whether an output buffer amplifier is needed. After this, the design of the final detector wiring can be finalized and its manufacture can proceed. This wiring can then be installed in the test cryostat and its performance verified.

8.6.2 Test Software

RSAA has developed the CICADA instrument control and data acquisition software. It has been in use at Mount Stromlo and Siding Spring Observatories as well as other local and international observatories for several years. It supports several different detector controllers including both the SDSU-1 and SDSU-2 controllers. Its use up to date has been mainly with CCD detectors, however, it can be easily modified to support IR detectors. It is proposed to modify CICADA to support HAWAII-2 detectors and to use it to characterize and optimize the detectors. More detail can be found in §9.6.5.

8.6.3 Data Analysis Software

IRAF will be the major software package used for data analysis and reduction when characterizing the detector. RSAA has extensive experience with IRAF. A suite of custom IRAF routines for detector characterization is currently under development at RSAA. Additional routines specific to NIFS requirements will be added as needed.

8.7 Detector Characterization

The methodology for characterizing the detector will be described in the following sections.

8.7.1 Operating Point

The first step is to determine the detector’s operating point. This will be achieved by varying the detector temperature and the voltage across the detector and measuring the following performance parameters

1. Read Noise in e.

2. Photon Conversion Gain in ADU/e.

3. Detector Node Capacitance.

4. Dark Current in e/s/pixel.

5. Full Well Capacity in e.

6. Linearity.

7. Detector Output Amplifier Settling Time.

8. Quantum Efficiency.

9. Cosmetic characteristics.

A graph of each parameter versus detector voltage and temperature will be plotted. From these plots an appropriate detector voltage and temperature will be selected that has good quantum efficiency sufficient well depth, and linearity and minimizes read noise, dark current, and any cosmetic problems.

There are two detector biases that need to be adjusted to control the dynamic range and the readout speed. They are BIASGATE and BIASPWR. BIASGATE is the gate voltage of the "pull-up" PFET for the cell source follower and BIASPWR is the source voltage of the PFET. BIASGATE is used to adjust the speed and dynamic range of the unit cell source follower. A trade off can be made between speed and dynamic range by adjusting BIASGATE from 3.3 V to 3.8 V. Lower voltage increases the speed at the expense of dynamic range, while higher voltage increases the dynamic range at the expense of speed. A typical BIASGATE voltage of 3.5 V is used for initial characterization. The affect on dynamic range can be measured by varying BIASGATE and doing linearity tests to obtain linearity plots versus BIASGATE voltage. The speed can be measured by varying BIASGATE and measuring output amplifier settling time. A plot of settling time versus BIASGATE voltage can be done. From these plots an appropriate BIASGATE and BIASPWR can be selected.

8.7.2 DC Stability

As previously stated in §8.3.7, drift has been reported as a problem with HAWAII detectors. It is therefore important to discuss ways of measuring drift and to explore ways of reducing it. The difficulty of measuring drift is to differentiate it from dark current. Both cause a change in output with no light on the detector, however, dark current has noise associate with it, while drift has no noise. The drift stability of the detector can therefore be measured by taking a series of darks and calculating their mean and variance. The variance can then be used to determine the dark current. The dark current contribution can then be subtracted from the mean signal value and the result plotted against time to determine the excessive drift.

Having determined the drift variation, the cause of the drift can then be investigated. The following are the more obvious that could cause drift

1. Variation of image data with drifts in the video processor chains.

2. Variation of detector output with changes in detector clock and bias voltages.

3. Variation of detector output with detector temperature.

If the detector temperature is controlled to specifications then the detector temperature should not be a cause of drift, however, temperature variations across the detector due to local heating from the output amplifier or multiplexer could cause drift problems and will need to be carefully investigated.

The video processor chain and the detector clock and bias voltages will drift with controller temperature. The first step is to then to measure these drifts. The video processor chain drift can be simply measured by grounding the video inputs and measuring the output ADU values as the controller temperature is varied. The detector clock and bias voltages are a little more complicated. First, their drift with temperature need to be measured by feeding each bias and clock generator into the video input of the Video Board and measuring the output ADU values as the controller temperature is varied. The next step is to calculate the detector output sensitivity to changes in bias and clock voltages by shorting the detector and measuring the variation of the detector output to changes in each of the bias and clock voltages. From these measurements, it should be possible to determined whether it will be necessary to reduce the drifts of the video processor chain and the detector clock and bias voltages. One way to achieve this is by temperature controlling the detector controller. A method of achieving this was discussed in §8.3.8.

8.7.3 Persistence

Persistence is a problem with sapphire PACE technology HAWAII-2 detectors (§8.1.2). The extent of this problem should be investigated. In a personal communication with Don Hall of the University of Hawaii, he reported that a reduction in persistence has been achieved by varying multiplexer clock voltages. Therefore an investigation of the effect of varying clock voltages on persistence should be carried out.

8.7.4 Linearity Correction

There are two main causes of non-linearity in infrared detectors

1. Non-linearity due to the detector output amplifier (§8.3.6).

2. Non-linearity due to the pixel detector. The detector capacitance changes with the detector reverse bias voltage. The detector reverse bias voltage changes as charge is accumulated on the detector.

It is not known at present how linear the detector will be and whether linearity corrections will be needed. Tests will be carried out to measure both low and high level non-linearity and to identify the major causes of non-linearity. If linearity correction is necessary then the standard technique of using a to parameterize the non-linearity will be used, where

,

N_m are the measured (i.e., non-linear) counts in ADU above the bias level, and N_t are the `true' (i.e., linear) counts in ADU above the bias level. In practice, a is estimated by taking a series of exposures at different exposure times with a constant illumination source. Then a straight line is fitted to a plot of N_m/t versus t (where t is the exposure time at constant illumination). From the slope m and y-intercept c of this fit, a is given by

.

8.7.5 Fringing

The sapphire PACE technology HAWAII-2 detector will probably show interference effects in the sapphire substrate (§8.1.2). This interference will lead to a modulation of the spectrum. Tests will have to be performed to determine how stable the interference pattern is with time and how best to flat field it out.

8.7.6 Multiplexer and Amplifier Glow

The HAWAII-1 devices exhibited amplifier and multiplexer glow problems. The HAWAII-2 devices are expected to have solved the multiplexer glow but this is yet to be verified. The HAWAII-2 will still have amplifier glow problems. With the HAWAII-1 devices, turning off the output amplifier when the detector is not being read out does reduce the amplifier glow problem. This also will be true with the HAWAII-2 devices. Turning on and off the output amplifier can be easily implemented in the SDSU-2 DSP code. However, turning the output amplifiers on and off can cause local heating of the detector around the output amplifiers. This may cause drift problems. Tests will need to be performed to determine the tradeoff between amplifier glow and drift caused by turning the output amplifiers on and off.

8.8 Detector Hardware Risks

8.8.1 Detector Delivery

The NIFS science detector will be a variant of the Rockwell 2048´2048 HAWAII-2 array (§8.1.2). Improved performance is expected over PACE technology devices using new technology 2.5 mm cutoff CdZnTe MBE devices, but the development timescale for these devices is unknown.

The risk of delayed delivery of the NIFS science detector will be mitigated by ordering a HAWAII-2 PACE detector, which has an 18 month delivery schedule, and aim to convert that order to a CdZnTe MBE device if these become available on a suitable timescale.

8.8.2 Detector Temperature Control

The spectrograph detector temperature must be controlled to tight tolerances in order to stabilize its operating parameters, including dark current and DC drift. The detector-mounting block will be heated above its static temperature and thermally controlled at this elevated temperature with a commercial temperature controller. There is a risk associated with achieving the required thermal stability that will impact detector performance.

The risk of not achieving the required thermal stability of the science detector will be mitigated by extensive testing of the engineering-grade detector in a test cryostat to determine the thermal stability requirement. The NIFS science detector-mounting block will be adjusted empirically to achieve this level of thermal stability before the science-grade detector is installed.

8.8.3 Detector Performance

The performance of the HAWAII-2 science detector has been predicted from published data for HAWAII-1 arrays and extrapolations for the improvements expected to be realized with a HAWAII-2 array. There are currently no HAWAII-2 data on which to base performance predictions, and there is a large range in key parameters, such as dark current distribution, for HAWAII-1 arrays. The risk associated with the performance of the science detector will be mitigated by in the following ways. Instrument performance will be modeled for a range of assumed detector parameters. The performance of early HAWAII-2 arrays will be monitored. Early delivery of a partially operational engineering array with which to characterize science detector performance will be sought.

8.8.3.1 Read Noise

NIFS is expected to be read noise limited for exposure times £ 40 min at J and H and £ 5 min at K. Achieving a read noise of < 5 e is therefore an essential factor in maximizing the instrumental sensitivity. The risk to performance of not achieving low read noise will be mitigated by specifying a read noise limit when purchasing the detector array, implementing read noise reduction strategies such as linear fitting to the integration ramp, and eliminating controller noise as a significant read noise source.

8.8.3.2 Dark Current

NIFS is expected to be dark current limited at J and H for integration times ³ 40 min and dark currents of 0.01 e/s/pixel. Achieving a modal dark current of < 0.1 e/s/pixel under normal operating conditions is therefore another essential factor in maximizing instrumental sensitivity at short wavelengths. The risk to short wavelength performance of not achieving a low, stable dark current will be mitigated in the following ways. Ensure that the detector temperature is stable and suitably cold and that detector bias voltages are highly stable. Eliminate sources of stray radiation and thermal emission from the spectrograph body.

8.8.3.3 Read Out Time

The target readout time for the detector is specified to be < 5 s. Assuming that the HAWAII-2 will have the same output amplifier performance as the HAWAII-1, this should be achievable by carefully selecting the wiring between the detector and the SDSU-2 Video processor board to have low capacitance. However, the specification of 5 s is derived from the performance model that makes certain assumptions about background emission and dark current. There may be error in these assumptions. The risk of not reading out the detector fast enough will be mitigated in the following ways. Include the capability to readout the detector faster through a subimage. Have a backup plan of reading out through more than one amplifier per quadrant or employing a pre-amplifier on the detector mount board to decrease the output amplifier settling time. Keep track of NIRI’s performance and using its results to fine-tune the performance model.

8.8.4 Detector Damage

The detector is one of the most critical components of the system. It is also one of the most fragile. Damage to the detector can occur in several ways. The following sections will discuss the ways in which damage can occur and ways in which the risk of damage will be mitigated.

8.8.4.1 Handling

Physical damage to the detector can occur when handling by dropping, squashing the detector or scratching the detector surface. The risk of handling damage to the detector can be mitigated in the following ways. Before handling the detector carefully work out exactly what has to be done and to have a practise run. Take extreme care when handling the detector. Remove all unnecessary equipment from the work bench area. Minimize the amount of handling by designing the detector assembly to be simple and easy to use.

8.8.4.2 Storage

Damage to the detector can occur during storage. Besides physical damage, damage due to moisture ingress or delamination due to temperature variation can occur to the detector if it is not stored under the correct environmental conditions. Also the detector could be lost or stolen. The risk of storage damage to the detector can be mitigated by seeking advice from Rockwell on what are the correct environmental conditions to store the detector and storing the detector in a safe squash proof container in a secure place.

8.8.4.3 Temperature Cycling

Damage to the detector is likely every time the detector is temperature cycled due to a finite number of Indium bump connections between the detector and the multiplexer going open. The risk of temperature cycling damage to the detector can be mitigated in the following ways. Not installing the detector into the NIFS cryostat until it is fully assembled and all testing of mechanisms, vacuum and temperature control is completed. Purchase an engineering detector on which all initial tests will be carried out. Build a test cryostat to do detector characterization.

8.8.4.4 Electrostatic Damage

Damage to the detector by electro-static discharge during assembly and disassembly, transportation, storage and use is possible. The risk of electrostatic damage to the detector can be mitigated by following the protection procedures outlines in §8.4.3.

8.8.5 SDSU-2 Delivery and Availability

The SDSU-2 detector controller is manufactured at San Diego State University by Bob Leach’s group, but is distributed by Infrared Labs. There is a possibility that Infrared Labs might go out of business or can not delivery the controller on time. The risk of non-delivery or unavailability of the SDSU-2 detector controller will be mitigated by ordering the SDSU-2 detector controller as early as possible and if Infrared Labs. do go out of business, then to purchase the SDSU-2 detector controller from Bob Leach.

8.8.6 SDSU-2 Induced Detector Drift

To properly subtract the fixed pattern dark current and to meet the requirement specification of drift being less than read noise, the detector has to be very stable to the order of a few electrons. To achieve this specification the drifts induced by the SDSU-2 detector controller video processors and clock and biases voltages have to be less than an electron.. The risk of SDSU-2 induced detector drift will be mitigated by measuring and understanding the source of any detector controller induced drift in the detector and having the backup plan of temperature controlling the SDSU-2 detector controller to reduce the drifts in the SDSU-2 detector controller video processors and clock and biases voltages.

8.8.7 Teflon Flex Circuit

It is proposed to use Teflon flex circuits for the internal cryostat wiring. Teflon is a very suitable material for cryostat wiring because it has low capacitance and very low outgassing. However, it is relatively a new material to be used in cryostat wiring at RSAA and has only been successfully used once at RSAA in a CCD cryostat instrument. The risk of using Teflon flex circuit will be mitigated in the following ways. Keep the cryostat wiring short so that if needed other material such as Kapton that does not have as low capacitance can be used. Check with other experts in the field whether Teflon flex circuit is a suitable material for cryostat wiring. Perform extensive temperature cycling and flexibility tests on Teflon flex circuits. Gain experience of using Teflon flex circuit by using it in the test cryostat.

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[1] http://www.mmm.com/Textool/prod_test_pga.0358.html.

[2] http://www.indium.com

[3] see Appendix §16.1

[4] http://www.4taconic.com/dielctrc/index.html

[5] http://www.min-e-con.com

[6] http://www.molex.com/product/ultimate/ultimate.html

[7] http://www.clarkesevern.com.au/products/harwin.html

[8] http://www.irlabs.com/cont.html